Working field:
The successful candidate is expected to contribute to a DFG funded research project on the electrical characterization and modeling of CNTFETs. Specific tasks comprise: (i) Electrical characterization of breakdown in CNTFETs with different channel formation methods (CVD, dispersion), different gate oxide materials (HfO2, Al2O3), and different substrate materials (SiO2, quartz). (ii) Development of a theoretical understanding of the breakdown mechanisms relevant for transistor based electronics and, using transistors and other test structures, determination of relevant material parameters for device modeling (TCAD). (iii) Development and design of test structures for compact model parameter extraction. (iv) Numerically efficient and stable extension of our existing compact models by physics-based formulations for the investigated breakdown mechanisms, enabling the investigation of the impact of CNTFET breakdown on the performance of HF circuits. (v) Experimental compact model verification. The work requires a strong cooperation within a team of researchers at CEDIC and at cooperation partners. Participation in research project related progress reports, presentations at project meetings and publications is also expected.
Requirements:
Applicants should hold an outstanding university degree (Master/Dipl.-Ing.) in electrical engineering. Hands-on experience in the following areas is mandatory: DC and S-parameter on-wafer experimental characterization of electronic devices; MOSFET theory and modeling; model implementation in standard commercial circuit simulators (preferably via Verilog-A); compact model parameter extraction. Additional knowledge in CNTFET operation principles and a good knowledge on semiconductor fundamentals will be a prerequisite for a successful application. Excellent English language and communication skills are highly desired.
How to apply:
Applications from women are particularly welcome. The same applies to people with disabilities.
Your application (in English only) should include: motivation letter, CV with description of completed projects in the areas described above, transcript of grades (i.e. the official list of coursework including your grades) and proof of English language skills. Please submit your comprehensive application by February 18, 2022 (stamped arrival date of the university central mail service applies), preferably via the TU Dresden SecureMail Portal
https://securemail.tu-dresden.de quoting “Research Associate application w561” in the subject header by sending it as a single pdf document to
michael.schroeter@tu-dresden.de or by mail to: TU Dresden, Fakultät Elektrotechnik und Informationstechnik, Institut für Grundlagen der Elektrotechnik und Elektronik, Professur für Elektronische Bauelemente und Integrierte Schaltungen, Herrn Prof. Michael Schröter, Helmholtzstr. 10, 01069 Dresden. Please submit copies only, as your application will not be returned to you. Expenses incurred in attending interviews cannot be reimbursed.
Reference to data protection: Your data protection rights, the purpose for which your data will be processed, as well as further information about data protection is available to you on the website:
https://tu-dresden.de/karriere/datenschutzhinweis.